High speed computing and imaging systems constantly push the state-of-the-art in data storage. Present day imaging systems and computer systems with two or more processors require data input and output rates beyond the capability of conventional packaging.
To accomplish high data rates, the physical distance between the processor and the memory array must be kept to a minimum to avoid signal delays. The through-put of a large memory array using conventional packages is determined by the longest signal line between the processor and the memory chip, assuming the memory chips can run at the same clocking rate as the processor, generally at 50 mhz and above. The following described memory array package solves problems in memory density and distance.